Abstract—Power dissipation is a problem of increasing concern to designers of VLSI circuits. To increase the performance and reliability of highly integrated circuits like DSP processors, Microprocessors and SoCs, transistors sizes are continues to scale towards Deep Submicron and Very Deep Submicron dimensions. The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. It is important to minimize the crosstalk for the fast and safe VLSI circuits. As more and more transistors are packed on the chip to increase the functionality more metal layers are being added to the integrated chips. Bus encoding technique is the promising method to reduce the both energy dissipation and crosstalk delay in integrated circuits like DSP processors, Microprocessors and SoCs. With the proposed bus encoding technique in this paper, both energy and crosstalk delay have been minimized with reference to coded and un-coded bus for different widths.

Index Terms—DSM, VLSI, Self transitions, Coupling transitions, Crosstalk delay

Cite: K Padmapriya, "BUS AFFECTS IN DEEP SUB-MICRON TECHNOLOGY AND METHODS TO REDUCE COUPLING EFFECTS," International Journal of Electrical and Electronic Engineering & Telecommunications, Vol. 2, No. 2, pp. 81-89, April 2013.