Abstract—Phase noise in a phase-locked loop is originated from reference oscillator, phase detector, loop filter, voltage controlled oscillator and frequency divider which make the system unstable by generating high phase noise at the output spectrum. In this work, a mathematical linear phase noise model is therefore developed to investigate the effect of reference noise, phase detector noise, voltage controlled oscillator noise, frequency divider noise and specifically the loop filter noise. For this purpose, the conventional active or passive low pass filter of the phase locked loop is replaced by a proportional-integral-derivative controller during acquisition. The noise problem of each component is formulated as a transfer function derived from linear analysis of the proposed mathematical noise model. The simulation results show that the effect of noise attenuation of voltage controlled oscillator is -40dB/decade while the noise attenuation of the reference noise, phase detector noise, proportional integral derivative controller noise and frequency divider noise are approximately -20dB/decade each. The 6.21GHz proposed proportional-integral-derivative controlled phase-locked loop is also highly stable with fast switching speed of 0.238nS at damping factor of 0.625 and phase margin of 92° for minimum phase noise.
 

Index Terms—Phase noise, Noise attenuation, noise characteristics, noise transfer function, PID controlled PLL, lock time

Cite: G. Konwar and T. Bezboruah, "Studies on Phase Noise Profiles of Proportional-Integral-Derivative Controlled PLL," International Journal of Electrical and Electronic Engineering & Telecommunications, Vol. 10, No. 5, pp. 369-376, September 2021. Doi: 10.18178/ijeetc.10.5.369-376