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CMOS Operational Floating Current Conveyor Circuit for Instrumentation Amplifier Application

Fahmi Elsayed, Mostafa Rashdan, and Mohammad Salman
College of Engineering and Technology, American University of the Middle East, Kuwait

Abstract—This paper presents a fully integrated CMOS Operational Floating Current Conveyor (OFCC) circuit. The proposed circuit is designed for instrumentation amplifier circuits. The CMOS OFCC circuit is designed and simulated using Cadence in TSMC 90 m technology kit. The circuit aims at two different design goals. The first goal is to design a low power consumption circuit (LBW design) while the second is to design a high bandwidth circuit (HBW design). The total power consumption of the LBW design is 1.26 mW with 30 MHz bandwidth while the power consumption of the HBW design is 3 mW with 104.6 MHz bandwidth.

Index Terms—Analog signal processing, CMOS, low power, low voltage, operational floating current conveyor, VLSI

Cite: Fahmi Elsayed, Mostafa Rashdan, and Mohammad Salman, "CMOS Operational Floating Current Conveyor Circuit for Instrumentation Amplifier Application," International Journal of Electrical and Electronic Engineering & Telecommunications, Vol. 9, No. 5, pp. 317-323, September 2020. Doi: 10.18178/ijeetc.9.5.317-323

Copyright © 2020 by the authors. This is an open access article distributed under the Creative Commons Attribution License (CC BY-NC-ND 4.0), which permits use, distribution and reproduction in any medium, provided that the article is properly cited, the use is non-commercial and no modifications or adaptations are made.