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FPGA Based Design and Implementation of DUC/DDC Based OFDM for Data/Image Transmission

Vasanth Kumar T. R.1 and K. V. Prasad 2
1. Research Scholar, Jain University, Bengaluru, Karnataka, India
2. Department of Electronics. & Comm. Eng., Bangalore Institute of Technology, Bengaluru, Karnataka, India

Abstract—The tremendous growth in the wireless communication system demands a very high-speed data transmission with better quality of service. The Orthogonal Frequency Division Multiplexing (OFDM) provides high-speed data communications by utilizing the spectrum more significantly than other approaches including Frequency Division Multiple Access (FDMA). Most of the OFDM transceiver architectures with different algorithms for wireless communication are conventionally used along with software-based approaches which are not suitable for real-time scenarios in Radio Frequency (RF) systems. There is no complete standard benchmark or prototyped hardware architecture for OFDM based RF systems. Very few existing designs are available with hardware overhead issues. In this paper, the proposed OFDM system offers low cost hardware architecture which includes quadrature amplitude modulation (QAM) modulation-demodulation, highly pipelined Inverse Fast Fourier Transform (IFFT)- Fast Fourier Transform (FFT) modeling along with digital conversion systems like Direct Up-Conversion (DUC) and Direct-Down-Conversion (DDC), which supports the RF systems for real-time requirements. The proposed OFDM systems support both data and image for transmission. The design is synthesized in Xilinx platform and simulated using Model-sim and prototyped on Artix 7 FPGA board. The proposed OFDM system is compared with existing similar architecture on the same FPGA device with hardware constraints improvements. 

 
Index Terms—DUC, DDC, FFT Model, FPGA, modulation, OFDM, RF system

Cite: Vasanth Kumar T. R. and K. V. Prasad, "FPGA Based Design and Implementation of DUC/DDC Based OFDM for Data/Image Transmission," International Journal of Electrical and Electronic Engineering & Telecommunications, Vol. 8, No. 4, pp. 199-204, July 2019. Doi: 10.18178/ijeetc.8.4.199-204