Senior scholars and distinguished researchers are welcome to join Editorial Board of IJEETC and help organize Special Issue on hot topics of electrical and electronic engineering & telecommunications. To propose a Special Issue, please contact us at ijeetc@ejournal.net

Design of Partial Discharge Real-Time Capture System

Yu-En Wu
National Kaohsiung University of Science and Technology, Kaohsiung, Taiwan
Abstract—This paper presents an online partial discharge real-time capture system whose system architecture includes Field-programmable Gate Array (FPGA) components, a Human–Machine Interface (HMI), and analog amplifying circuits. The analog amplify circuit is designed to achieve a magnification rate of 10 times and a bandwidth of 100 MHz. The software developed in this work can be used for real-time online monitoring, recording, and analysis of partial discharge. The captured signal of the partial discharge was analyzed by the FPGA by using a fast Fourier transform, time–frequency map, and phase-resolved partial discharge, and the results were transmitted through the RS-232 to the HMI for display. System stability is improved through data analysis to determine possible causes of partial discharge, averting both user risk and damage to equipment.
 
Index Terms—Field-programmable gate array, partial discharge, real-time online monitoring

Cite: Yu-En Wu, "Design of Partial Discharge Real-Time Capture System," International Journal of Electrical and Electronic Engineering & Telecommunications, Doi: 10.18178/ijeetc.191111
Copyright © 2012-2019. International Journal of Electrical and Electronic Engineering & Telecommunications, All Rights Reserved
E-mail: ijeetc@ejournal.net