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DESIGN AND IMPLEMENTATION OF FASTER PARALLEL PREFIX KOGGE STONE ADDER

Sunil M, Ankith R D, Manjunatha G D and Premananda B S
Department of Telecommunication Engineering, R. V. College of Engineering, Bangalore 560059, India.

Abstract—In this paper we proposed a high speed Kogge-Stone adder by modifying the existing Kogge- Stone architecture (Pakkiraiah Chakali and Madhu Kumar Patnala, 2013). Currently speed of the multipliers is restricted by the speed of the adders used for partial products addition. Kogge- Stone is one of the fastest parallel prefix adders; we eliminated the redundant Black-Cells and performed rerouting thus minimizing the logic delay and routing delay. Coded modified architecture in Verilog HDL, simulated and synthesized using Xilinx ISIM and XST. Compared the architecture with Kogge-Stone adder, an improvement in the speed of 9.84% is achieved.

Index Terms—Parallel-adders, Fan-out, Redundant black-cells, Grey cell, Kogge-Stone Adder (KSA)

Cite: Sunil M, Ankith R D, Manjunatha G D and Premananda B S, "DESIGN AND IMPLEMENTATION OF FASTER PARALLEL PREFIX KOGGE STONE ADDER," International Journal of Electrical and Electronic Engineering & Telecommunications, Vol. 3, No. 1, pp. 116-121, January 2014.